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Volume 77, 1948-49
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Synchronized Feedback In Scale-Of-2 Electronic Counters.

[Abstracted from a thesis submitted to the University of New Zealand on October 25, 1946.]

Introduction.—For automatic counting at the highest possible speeds of any events which can be made to produce suitable electrical impulses, hard-valve-electronic counters are widely used. The best circuits working on the well-known scale-of-2 principle have advantages of simplicity, stability, speed, reliability of

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action, and tolerance in construction over other types. It must be assumed here that the reader is already familiar with the scale-of-2 principle. Its sole disadvantage is the considerable inconvenience of converting the reading to decimal notation, especially when there are many stages. Successful attempts have been made to produce decimal scales to avoid this difficulty, either by using rings of five valves, each of which cuts off all the others as it conducts, or by putting certain extra couplings between the stages of a 4-stage scale-of-2 counter, which overwhelm the normal action at certain parts of the cycle (e.g. Potter's “forced reset”) and make the cycle 10 instead of 16. In either case, however, there is some loss of the advantages listed above for the simple scale-of-2 counter, and there is reason to believe that this loss is fundamental to the method and cannot be entirely overcome by suitable design. For this reason an attempt was made to design an entirely new decimal counter in which the component stages operate only in their normal manner. It was found to be possible to produce such a counter having any even cycle whatsoever. by a general method referred to as synchronized feedback.

Feedback in Counters.—Before describing this method, it is necessary to explain briefly the idea of feedback, as it applies to a counter circuit. If, say, a 3-stage scale-of-2 counter, having a complete cycle of 8, is arranged so that at some point in its cycle it feeds an extra impulse into its own input, then, ignoring for the present questions of resolving time and actual mechanism, it is clear that the counter will return to its initial state after only 7 external impulses. Similarly, the cycle could be reduced to 5 (external impulses) by feeding back 3 extra impulses during the cycle. This method of changing the cycle to a desired value must have been obvious from the first, but owing to certain practical difficulties which will be discussed, it does not seem to have been much used. A circuit used in the Loran navigational equipment was the only application, besides the present one, to which we were able to find reference. Moreover, this uses a different basic type of counter (condenser charging), which cannot be substituted for the present type owing to a number of limitations. The forced-reset principle mentioned above is different from feedback as discussed here.

Difficulty of Feedback.—The difficulty in the use of feedback is as follows. The correct number of feedback impulses must be produced, one at a time, at suitable times during the cycle, and this is done by the action of one or more of the later stages. However, any such stage only changes over because of (and simultaneously with, to within 1 μs or less) an action of every stage preceding it. If the feedback impulse is returned very quickly, it is liable to be confused with; the pulse which initiated it in the earlier stage, and the latter may only respond once instead of twice. If, on the other hand, the extra impulse were deliberately delayed so that it was always recorded, it might itself inhibit the counting of an ordinary impulse arriving about the same time. In other words, the recovery time would become longer for the particular impulse that initiates the feedback. This irregularity would be very undesirable, apart from the difficulty of producing a suitable delay.

Synchronized Feedback.—In the present method (see Fig. 1), we use feedback into a stage after the first, the (x+1)th stage. The delay is provided by the operation of the previous stage (the xth), which may or may not be the first. When feedback impulses occur, they are synchronized with the xth stage changing to the on* state, and are therefore interpolated exactly halfway, in the count, between the normal impulses into the (x+1)th stage, which occur when the xth stage goes off. No stage is required, at any time, to operate more rapidly than the first stage has operated. Apart, therefore, from any small incidental differences between stages, the first stage is responsible for all missed impulses, and these can be fully accounted for by stating a single resolving time in the normal way.

Holding Circuit.—The synchronization is effected by means of a holding circuit. This is a circuit similar to a normal stage with two stable states, but with separate inputs (to the plate or grid) to each triode, instead of the usual input to a common point. Because of this, a positive impulse at A will change the circuit to on but not to off, and vice versa at B. (Impulses of one sign only are normally used througout a counter. Positive impulses are selected by the buffer triodes, as they are used in the basic scale-of-2 circuit chosen. These buffers

[Footnote] * It is convenient to refer to the initial and alternative stable states of a stage as “off” and “on” respectively.

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Fig 1 General circuit for synchronized feedback.

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are used in every connection between stages.) The holding circuit is normally off, and the impulses which reach it from time to time, via the connection shown, as the xth stage goes on, have no effect. At appropriate points in the cycle, an impulse is fed back from one of the later stages, as it goes on, to the holding circuit, which comes on also. So far, there is no effect on the earlier stages. However, the next time the xth stage goes on, the impulse it produces changes the holding circuit to off, and, in going off, the holding circuit sends an impulse into the (x+1)th stage. The latter does not normally receive an impulse, when the xth stage goes on, and therefore there is no coincidence or overlapping, and the extra impulse is duly recorded. Except that the apparent count is now greater than the true count by 2x, counting continues normally again, until the next feedback impulse is sent to the holding circuit.

General Theory.—Consider now a cycle of any even number C. Let C = 2xD. Where × and D are integers and D is odd. Let D = 2x—S. Where 2y-1 < D < 2y; and y is an integer. Then there must be x+y stages, and it is apparent that 2x+y-1 < O < 2x+y. The first x—1 stages are fed only in the normal scale-of-2 manner, and feed only to the next stage. The xth stage triggers the holding circuit as well, and the impulses from the latter are fed to the (x+1)th stage. Now 2y-1 < D and D = y—S. S < 2y-1, and any number less than 2y-1 can be expressed as the sum of selected numbers from the sequence.

1 2 4 8 2y-2
=20 =21 =22 =23 =2y-2

The corresponding number of feedback impulses (adding up to S), to cock the holding circuit, can be obtained from the last, second to last, (y−1)th last or (x+2)th stage, respectively. Hence the whole circuit must be as shown. Since S is odd, the last stage must always feed back. Other stages, from the (x+2)th to the 2nd-to-last, may or may not feed back, according to the value of S required. Since S impulses are fed back, each equivalent to 2x external impulses, and since the counter would normally complete its cycle after 2x+y impulses, we have that the modified cycle =2x+y—S2x=2x (2y—S) =2x D = C, as required. × must be at least one, to provide a stage to trigger the holding circuit. Hence C must be even.

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Fig 2. Scale-of-2 circuit used.

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Further Results.—With the 3-triode basic scale-of-2 circuit actually used (the third triode being a buffer and rectifier), it has been shown that the number of (twin-triode) valves required can never exceed 9 log10C. It is usually nearer 6 or 7 log10C, cf. the value 5 log10C for a simple scale-of-2 counter of the same type. If every stage, including the holding circuit, contains a small neon lamp to show when it is on, it has been proved that it is always possible to allocate to the lamps, for any cycle at all, values whose sum at any time, for the lamps on, is the number of impulses counted. This is important, if it is desired to indicate the answer with a meter, instead of lamps. Meters can be conveniently used in many cases, e.g. for a cycle of 10, or of 100 (2 meters). The cycle of 10 has the disadvantage of requiring the maximum possible number of valves (9), but 100, 1000, 60, 360, and most similar cycles, are satisfactory in this respect (<7 log10C). The circuit for 1000 has the advantage of requiring a minimum modification of an existing scale-of-2 counter. Apart from meter indication or adding lamp values, readings may be obtained from tables of lamp settings, in the same way as for a scale-of-2 counter. The only difference is that there are blanks for certain settings of the lamps which are skipped when feedback occurs. Whereas the table for an ordinary scale-of-2 counter increases in size indefinitely, with the number of stages used, and may be of many pages, the tables for cycles of 100 or 1000 will go on a single sheet, and complete cycles of 10,000, 1,000,000, etc., may be obtained, simply by connecting two or more counters in series and taking the corresponding number of readings, without requiring calculations or increasing the table.

Experimental.—Counters with cycles of 10, 100, 1,000 and others, have been constructed and tested satisfactorily. The basic scale-of-2 circuit actually used (see Fig. 2) was due to the Defence Development Section, Christchurch, New Zealand. However, this circuit is not essential to the method. Our only requirements are to be able

(a)

to take impulses from both plates of some stages (i.e. “on” as well as “off” impulses), which is always possible with a symmetrical circuit, and

(b)

to parallel the output from two or more buffers. This is usually fairly easy, especially, as in our case, if the buffers are normally biassed to cut-off so as to be sensitive only to positive impulses (see Fig. 3).

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Fig 3 Parallel outputs

The holding circuit used in the preliminary try-out was simply an ordinary counter stage with separate condenser inputs to each grid instead of the normal cathode input. It works satisfactorily, but owing to the capacity loading of the grids must have had an unduly long recovery time. This will be overcome, at the expense of one extra valve, by using separate triggering triodes, with plates parallel to those of the holding circuit, after the manner of Stevenson and Getting's counter stage.

Resolving Times.—The reason for putting the uncomplicated scale-of-2 stages, if any, at the input end of the counter, is clear when we consider the effects of small individual differences between stages. If x=1, so that the xth stage is the first, or if the preceding stages have been “speeded up,” it is necessary that the (x+1)th stage and the holding circuit should be faster than the xth stage by a small but definite margin. This can be arranged by a small adjustment of time constants. Later stages are not critical. Stages before the xth may be speeded up by suitable (more critical) adjustment, if desired, provided that the resolving

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time of the 2nd stage is < twice that of the first, the resolving time of the 3rd stage < 4 times that of the first, and so on up to the xth. Otherwise prolonged insensitive periods may occur. Similar conditions apply to all types of counters. When they are satisfied, the resolving time is simply that of the first stage. In synchronized feedback, if × > 1 and the first stage has not been speeded up, the other stages are not critical.

Conclusion.—Since this work was commenced in 1945, descriptions of a number of practicable decimal counters have been published, in spite of the limitations mentioned above. However, the method is still of interest as showing the possibility of varying the cycle by means of feedback, using only the normal action of the individual stages, and it may be a useful alternative, for certain purposes, to other methods of avoiding the conversion difficulty.

Table for Cycle of 100.
Dots indicate stage on.
Stage 4
3
2
1
7 6 5
00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15
16 17 18 19 20 21 22 23 24 25 26 27
28 29 30 31 32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47 48 49 50 51
52 53 54 55 56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71 72 73 74 75
76 77 78 79 80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95 96 97 98 99

Values of lamps are 1, 2, 4, 8, 12, 24, 48; and 4 for the holding circuit (indicated by underlining).